Wideband frequency hopping spread spectrum receivers and related methods

ABSTRACT

Systems and methods are disclosed that provide ultra-wideband frequency hopping spread spectrum (UWB-FHSS) solutions for receive architectures. These UWB-FHSS receive architectures can receive signals transmitted over an extremely wide bandwidth while using a relatively slow analog-to-digital converter (ADC) without suffering from unacceptable performance degradation. For example, ADCs can be used having sample rates lower than standard Nyquist criteria would require for the bandwidth of the spread spectrum utilized.

RELATED APPLICATIONS

This application claims priority to the following co-pending provisional application: Provisional Application Ser. No. 61/008,239, which was entitled “WIDEBAND FREQUENCY HOPPING SPREAD SPECTRUM TRANSMITTERS AND RECEIVERS AND RELATED METHODS” and was filed on Dec. 19, 2007, and which is hereby incorporated by reference in its entirety.

This application is related in subject matter to concurrently filed applications: U.S. patent application Ser. No. ______, entitled “WIDEBAND FREQUENCY HOPPING SPREAD SPECTRUM TRANSMITTERS AND RELATED METHODS,” and U.S. patent application Ser. No. ______, entitled “WIDEBAND FREQUENCY HOPPING SPREAD SPECTRUM TRANSCEIVERS AND RELATED METHODS,” and which are each hereby incorporated by reference in its entirety.

This application is also related in subject matter to the following applications: U.S. patent application Ser. No. 11/545,310, entitled “DIRECT BANDPASS SAMPLING RECEIVERS WITH ANALOG INTERPOLATION FILTERS AND RELATED METHODS,” which was filed on Oct. 10, 2006; and U.S. patent application Ser. No. 11/545,642, entitled “NYQUIST FOLDED BANDPASS SAMPLING RECEIVERS AND RELATED METHODS,” which was filed on Oct. 10, 2006; and which are each hereby incorporated by reference in its entirety.

TECHNICAL FIELD OF THE INVENTION

This invention relates to receiver and transmitter architectures for efficient wireless communications and, more particularly, to receiver and transmitter architectures using spread spectrum techniques.

BACKGROUND

A wide variety of signals and related protocols exist for the use of radio frequency (RF) signals in communication systems and other devices, such as radar systems. A commonly desired characteristic for both communications and radar applications is to have a spread spectrum signal that is hard to intercept. Spread spectrum solutions utilize signals that are spread across a relatively wide spectral range of frequencies and, therefore, often have reduced interference and higher degrees of security than narrow band solutions.

One common approach to spread spectrum is frequency hopping. In a frequency hopping solution, the transmit/receive signals are moved around or hopped to different frequencies within a wide spectral range of frequencies. One practical limitation experienced by spread spectrum solutions, including spread spectrum frequency hopping solutions, is that the total frequency spread across a frequency spectrum is practically limited by the bandwidth of the circuitry being utilized. For example, receiver bandwidth is often limited by the signal-to-noise ratio (SNR) performance of the digitizing circuitry within the receiver. An extremely wide bandwidth ADC (analog-to-digital converter), for example, typically results in unacceptably low SNR.

SUMMARY OF THE INVENTION

The systems and methods disclosed herein provide ultra-wideband frequency hopping spread spectrum (UWB-FHSS) solutions for receive architectures. These UWB-FHSS receive architectures can receive signals transmitted over an extremely wide bandwidth while using a relatively slow analog-to-digital converter (ADC) without suffering from unacceptable performance degradation. For example, ADCs can be used having sample rates lower than standard Nyquist criteria would require for the bandwidth of the spread spectrum utilized.

DESCRIPTION OF THE DRAWINGS

It is noted that the appended drawings illustrate only exemplary embodiments of the invention and are, therefore, not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

FIG. 1A is a block diagram for a ultra-wideband frequency hopping spread spectrum (UWB-FHSS) transmitter.

FIG. 1B is a block diagram for a UWB-FHSS receiver.

FIG. 2A is a signal diagram for a UWB-FHSS transmitter.

FIG. 2B is a signal diagram for a UWB-FHSS receiver.

FIG. 3A is a block diagram for additional circuitry for a UWB-FHSS transmitter.

FIG. 3B is a block diagram for additional circuitry for a UWB-FHSS receiver.

FIGS. 4A-4D are block diagrams for alternative embodiments for UWB-FHSS receivers and transmitters.

FIG. 5 is a block diagram for a radar system embodiment utilizing UWB-FHSS transmitters and UWB-FHSS receivers as described herein.

FIG. 6 is a block diagram for a communication system embodiment utilizing UWB-FHSS transmitters and UWB-FHSS receivers as described herein.

FIG. 7 is a block diagram for a transmitter-to-receiver broadcast system embodiment utilizing UWB-FHSS transmitters and UWB-FHSS receivers as described herein.

DETAILED DESCRIPTION OF THE INVENTION

The systems and methods disclosed herein provide ultra-wideband frequency hopping spread spectrum (UWB-FHSS) solutions for transmit and receive architectures. These UWB-FHSS transmit and receive architectures can transmit and accurately digitize frequency hops over an extremely wide bandwidth while using a relatively slow analog-to-digital converter (ADC), such as an ADC with a sample rate slower than the standard Nyquist criteria given the bandwidth spread. The UWB-FHSS systems described herein can be utilized to provide transmitter and receiver solutions operating above about 1 GHz and having a wide bandwidth such as a bandwidth of about 10 GHz to 20 GHz or more. It is further noted that the UWB-FHSS systems described here are useful both for communication systems and radar systems.

FIG. 1A is a block diagram for a UWB-FHSS transmitter 100. Transmit signals 110, for example, a signal pulse centered on an intermediate frequency (IF), are sent to a transmit IF sampler 102. The transmit IF sampler 102 receives a sampling clock signal 112 and a generates spread spectrum signal 122. As described in more detail below, spread spectrum signal 122 includes a plurality of individual frequency components spread across a wide frequency spectrum with components associated with the harmonics of the frequency of the sampling clock signal 112. As depicted, the spread spectrum signal 122 is applied to selectable filter bank 104. As depicted, selectable filter bank 104 has a plurality of selectable filters 114 (F1), 116 (F2) . . . 118 (FN) and receives a frequency selection signal 126 that selects one of these filters. As also described in more detail below, each of these filters is associated with a harmonic of the sampling clock signal 112. When one of these filters is selected, one of the individual frequency components is allowed to pass on as a selected frequency hop 124. The selected frequency hop 124 from the selectable filter bank 104 will be associated with a harmonic of the sampling clock signal 112 depending upon which filter 114 (F1), 116 (F2) . . . 118 (FN) was selected by the frequency selection signal 126. The selected frequency hop is then sent to wideband amplifier 106 and then to wideband antenna 108 for transmission of transmit RF signals 120 that represent the individual frequency hop selected for transmission.

More generally, the selectable filter bank 104 can be frequency select filter circuitry configured to provide a plurality of different selectable filter passband frequency ranges across a bandwidth that includes at least the sampling clock frequency (f_(CLK)) and one harmonic of f_(CLK), such that the frequency select filter circuitry has an output signal within a selected filter passband frequency range. A plurality of selectable filters, such as selectable filter bank 104, is one implementation for this frequency select filter circuitry. Another embodiment for the frequency select filter circuitry would be one or more tunable filters. In such an implementation, the frequency selection signal 126 would be controlling the tuning of the filter to be used. The frequency selection signal 126 could also be used to select the filter to be tuned if two or more tunable filters were being utilized.

FIG. 1B is a block diagram for UWB-FHSS receiver 150. The RF signals 120 are received by a wideband antenna 152 and then sent to a wideband amplifier 154. The output of the wideband amplifier 154 is then sent to receive RF sampler 156. Receive RF sampler 156 also receives a sampling clock signal 162. This sampling clock signal 162 is used to down convert the RF signals down to lower frequencies through bandpass sampling. As described in more detail below, the receiver RF sampler 156 will output signals 164 that will include sampled signals associated with harmonics of the sampling clock signal 162. The sampling clock signal 162 is selected so that one of these sampled signals will fall on a desired intermediate frequency (IF) of the receiver 150. The sampled signals at IF are then processed with the narrowband IF interpolation filter 158 that is centered on the desired IF frequency. The narrowband IF interpolation filter 158 then outputs the receive IF signals 160 which are located at the IF frequency.

More generally, the narrowband IF interpolation filter 158 can be narrowband filter circuitry configured to receive the sampled signals and to output filtered signals at an intermediate frequency (f_(IF)). As such, the narrowband filter circuitry is configured to provide a filter passband frequency range around an intermediate frequency (f_(IF)). This filter passband frequency range is configured to match the intermediate frequency utilized to generate the signal being received by the UWB-FHSS receiver 150. In one implementation, the narrowband filter circuitry can be an interpolation filter 158.

FIG. 2A and FIG. 2B are signal diagrams that further describe the signals discussed with respect to FIG. 1A and FIG. 1B, respectively. For each of these diagrams, the sampling clock signal is assumed to be 2000 Mega-samples-per-second (Msps), and the IF is assumed to be 165 MHz. Also, for these diagrams, the frequency values are in MHz as designated by the f (MHz) indication. It is noted that for the UWB-FHSS receiver and transmitter embodiments described herein, a sampling clock frequency of about 1 GHz or more is desirable, and a bandwidth spanned by the minimum and maximum frequencies by the frequency select filter circuitry of about 10 to 20 GHz or more is desirable. It is further noted that an IF of about 200 MHz or less is also desirable. However, any IF could be selected as desired depending upon the particular application for the UWB-FHSS receivers and/or transmitters.

FIG. 2A represents transmit side signals for the UWB-FHSS transmitter 100. Signal diagram 202 is first and represents the transmit signal 110 which is centered on the IF frequency (f_(IF)) of 165 MHz. The signal diagram 204 is next and represents the output of the transmit IF sampler 102. The transmit IF sampler 102 will effectively combine the transmit signals 110 with the sampling clock (f_(S)) harmonics (0f_(S), 1f_(S), 2f_(S), 3f_(S), 4f_(S), etc.) to create frequency components at X±f_(IF) where X is the sampling clock harmonics and where f_(IF) is the frequency of the incoming IF transmit signal. This process can be thought of as a convolution in frequency domain such that the two-sided IF signal spectra is convolved with the two-sided sampler spectra with harmonics 0, +/−1f_(S), +/−2 f_(S), etc. to result in various frequency components. Assuming the sampling clock is 2000 Msps and the IF is 165 MHz, therefore, the transmit IF signal 110 at 165 MHz will in effect be combined with a DC signal (0f_(S)), the 2000 MHz clock signal, a 4000 MHz signal (2f_(S)), a 6000 MHz signal (3f_(S)), and so on. The result of this process creates frequency component 122E at 165 MHz associated with the DC or 0^(th) harmonic (0f_(S)), frequency components 122A at 1835 MHz and signal 122B at 2165 MHz that are associated with the sampling clock (f_(S)), frequency components 122D at 3835 MHz and signal 122D 4165 MHz that are associated with the second harmonic of the sampling clock (2f_(S)), and so on. The diagram 206 is next and represents the filters available in the selectable filter bank 104. As depicted these filters include filter 114 centered on 1835 MHz, filter 116 centered on 2165 MHz, filter 220 centered on 3835 MHz, filter 118 centered on 4165 MHz, and a low-pass filter 222 covering 165 MHz. Filter 220 has been selected by the frequency selection signal 126. Signal diagram 208 represents the output signal from the selectable filter bank 104. Because filter 220 has been selected, the output frequency hop 124 centered on 3835 MHz is passed through the filter bank.

FIG. 2B represents receive side signals for the UWB-FHSS receiver 150. Signal diagram 252 is first and represents the RF input signals received by the UWB-FHSS receiver 150. Assuming the transmitter 100 transmits a frequency hop 120 at 3835 MHz as in FIG. 2A, the frequency of the RF signal being received is 3835 MHz. Signal diagram 254 is second and represents the output of receive RF sampler 156. The receive RF sampler 156 will effectively combine the receive signals 120 with the sampling clock (f_(S)) harmonics (0f_(S), 1f_(S), 2f_(S), 3f_(S), 4f_(S), etc.) to create frequency images at X±f_(RF) (the receive RF signal frequency component (f_(RF))) where X is the sampling clock harmonics. Assuming the sampling clock is 2000 Msps, therefore, the incoming RF signal 120 at 3835 MHz will in effect be combined with a DC signal (0f_(s)), the 2000 MHz clock signal (1f_(S)), a 4000 MHz signal (2f_(S)), a 6000 MHz signal (3f_(S)), and so on. As such, the DC or 0^(th) harmonic (0f_(S)) produces a signal 164E at 3835 MHz. The first harmonic (1f_(S)=2000 MHz) produces an image 164A at 1835 MHz and another image at a much higher frequency. The second harmonic (2f_(S)=4000 MHz) produces an image 164B at 165 MHz and another image at a much higher frequency. The third harmonic (3f_(S)=6000 MHz) produces an image 164C at 2165 MHz and another image at a much higher frequency. The fourth harmonic (4f_(S)=8000 MHz) produces an image 164D at 4165 MHz and another image at a much higher frequency, and so on. The diagram 256 is next and represents the narrowband IF interpolation filter 158 which has a passband filter response centered on the IF frequency of 165 MHz. Signal diagram 258 represents the receive signal images 160 at IF (e.g., 165 Mhz) that are output by the narrowband IF interpolation filter 158. These receive signal images 160 correspond to the image 164B that folded to the IF frequency of 165 MHz.

It is noted that the sampling clock signal frequency would be known to the receiver. It is further noted that the frequency hopping pattern used by the transmitter could also be known by the receiver, if desired. Frequency hopping has been used in many prior systems to provide for security in communications. It is difficult for an intercepting device to know where the transmitter will hop next. The frequency hopping receiver, however, will typically have prior knowledge of the hop sequence to be utilized. This prior knowledge can be implemented in a number of different ways. One example is to have a hop sequence table stored at both the receiver and transmitter. However, it is noted that a wide variety of implementations could be used to provide this hop sequence to be utilized by the transmitter and receiver for a given communication sequence.

With the systems and methods described herein, the frequency hopping pattern or sequence does not need to be known by the receiver because the receiver can simply use the image that folds to the IF (e.g., 165 MHz). If the same sampling clock frequencies are used by the transmitter and the receiver, then the frequency components would fold to the same frequencies. These techniques described herein, therefore, provide a significant advantage over prior frequency hopping receivers that require knowledge of the frequency hopping pattern. It is further noted that Doppler shift of received signals could also be determined by knowing where the signals should hop with no Doppler shift. Other variations could also be utilized, as desired, while still taking advantage of the wideband frequency hopping spread spectrum techniques described herein.

In some implementations, it may be desirable for the receive sample clock to be slightly different than the transmit sample clock. In this case, the signals would not alias to quite the same place. As such, a frequency hop table would be needed if it was desired to be able to estimate Doppler shift on the hop because the Doppler shift would result in a small frequency offset that might be ambiguous with the small change in frequency for the different hops.

FIG. 3A is a block diagram for additional circuitry for a UWB-FHSS transmitter embodiment 300. As described above with respect to FIG. 1A, the transmit circuitry 100 receives IF transmit signals 110 and outputs the RF signals 120A. The IF transmit signals 110 can be generated using digital signal processing (DSP) circuitry 304 to produce digital signals that are converted to analog signals using a digital-to-analog-converter (DAC) 306 and then mixed up to the IF frequency using IF mix circuitry 308.

FIG. 3B is a block diagram for additional circuitry for a UWB-FHSS receiver embodiment. As described above with respect to FIG. 1B, the receive circuitry 150 receives RF input signals 120B and outputs IF receive signals 160. The IF receive signals 160 can be mixed down to an analog baseband signal using IF mix circuitry 318 and then digitized using analog-to-digital converter (ADC) 316. Alternatively, the IF receive signals can be provided directly to an ADC 316 implemented as a bandpass ADC or a low-pass ADC. In such a case, the IF mix circuitry 318 could be eliminated, if desired. The output of the ADC 316 can be provided to a DSP 314 for processing.

It is noted that for a transceiver embodiment, the transmit side DSP 304 and the receive side DSP 314 can be implemented using a single DSP, or two DSPs as desired, within a single transceiver device or system. This transceiver embodiment, therefore, would include the DSP 304, the DAC 306 and/or the IF mix circuitry 308, and this transceiver embodiment would also include the DSP 314, the ADC 316 and/or the IF mix circuitry 318. It is also noted that the transceiver embodiment could use a shared wideband antenna for both transmit and receive operations, if desired, or could be implemented by using separate transmit and receive antennas.

FIG. 4A is a block diagram for an alternative embodiment 400 for a UWB-FHSS receiver. In this embodiment, a plurality of narrow-band interpolation filters 402A, 402B, 402C . . . are used in place of the single narrow band interpolation filter 158 in FIG. 1B. As depicted, the plurality of narrow-band interpolation filters 402A, 402B, 402C . . . are coupled in parallel to receive the output of the receive RF sampler 156 and to produce respective output signals 404A, 404B, 404C . . . .

The multiple interpolation filters 402A, 402B, 402C . . . can provide more flexibility in how the hops alias or fold back to IF. The parallel outputs 404A, 404B, 404C . . . can be processed to facilitate reception of transmitted signals, particularly where slightly different sample clocks are used for reception. For example, suppose that the transmit IF was 165 MHz and the transmit clock was 2000 Msps as shown in FIG. 2A, but also suppose that the receive clock was 2040 Msps instead of 2000 Msps. Then, the lower five transmit hop frequencies (165 MHz, 1835 MHz, 2165 MHz, 3835 MHz, 4165 MHz) would fold when received to (165 MHz, 205 MHz, 125 MHz, 245 MHz, 85 MHz, respectively). If a set of narrow-band interpolation filters were provided in parallel about these frequencies, the output could be bandpass sampled with a single ADC clocking at 100 Msps, for example, and the five transmit hop frequencies would end up at digital frequencies 0.7, 0.1, 0.5, 0.9, 0.3, respectively, on a [0,1] digital frequency scale. A single interpolation filter covering this frequency range could be used, but the possibility would exist for additional interferers in this band and the total bandwidth of the interpolation filter would exceed the Nyquist/Shannon criteria for the ADC. As such, interferers could ambiguously alias and cause confusion. In contrast, multiple narrowband interpolation filters about these frequencies, even with some finite bandwidth to account for Doppler shift (e.g., in the case of radar or in the case of a communications transmitter moving relative to the receiver), would allow unambiguous reception by the ADC because the different folded frequency hops would all alias to different digital regions with this example ADC clock. Significantly, these multiple narrowband interpolation filters, therefore, would allow the receive side to decrypt the hop sequence easily without having to synchronize anything between the receiver and the transmitter. Alternatively, it is further noted that a single interpolation filter could be used that covers all of the possible IF variations (e.g., passband covering 85 MHz to 245 MHz in the example above), if desired.

FIG. 4B is a block diagram for an alternative embodiment 420 for a UWB-FHSS receiver. In this embodiment, wideband pre-select filter circuitry 422 is added between the wideband amplifier 154 and the receive RF sampler 156.

FIG. 4C is a block diagram for an alternative embodiment 440 for a UWB-FHSS transmitter. For this embodiment, the transmit sampling clock signal 112 for the transmit IF sampler 102 can be generated as a modulated or tuned sampling clock signal by modulated/tuned sample clock circuitry 442. A modulated sampling clock signal is one that is adjusted over a given transmission cycle so that the clock is being adjusted as data is being transmitted. One example if a modulated sampling clock is one for which the frequency is ramped from one frequency to another during the transmission cycle. If the clock signal is modulated, then additional information can be provided in the transmitted signal to help later reception of the signals. Additionally, the signal can be further spread to reduce detectability. A tuned clock signal is one that is tuned to a given frequency for a transmission cycle but can be tuned to a different frequency for other transmission cycles. If the clock signal is tuned, then the frequency of any individual frequency hop can be adjusted for optimum performance. For example, crowded sections of the bandwidth can be avoided by tuning the transmit clock. It is additionally noted that both a modulated clock and a tuned clock could be used in the same implementation. In such a case, the tuning would likely occur first to select the starting clock frequency for the transmission cycle, and then the clock signal would be modulated during the transmission as desired.

FIG. 4D is a block diagram for an alternative embodiment 450 for a UWB-FHSS receiver. For this embodiment, the receive sampling clock 162 for the receive RF sampler can be generated as a modulated or tuned sampling clock signal by modulated/tuned sample clock circuitry 442. As with the transmitter embodiment 440 of FIG. 4C, therefore, the sampling clock signal 162 can be modulated during a receive cycle, tuned for a receive cycle, or both. Preferably, the modulation provided for a receive cycle would correspond to the modulation used by the transmitter. For example, if the transmit clock resulted in chirped hops, then the receive clock could de-chirp the hops. Similar to the fixed clock case, the tuning provided for the receive cycle would match the tuning used by the transmitter.

The use of tuned sampling clock signals and modulated sampling clock signals are discussed, for example, in U.S. patent application Ser. No. 11/545,310, entitled “DIRECT BANDPASS SAMPLING RECEIVERS WITH ANALOG INTERPOLATION FILTERS AND RELATED METHODS,” which was filed on Oct. 10, 2006, and U.S. patent application Ser. No. 11/545,642, entitled “NYQUIST FOLDED BANDPASS SAMPLING RECEIVERS AND RELATED METHODS,” which was filed on Oct. 10, 2006, the entire text and all contents for each of which are hereby expressly incorporated by reference in their entireties.

As described herein, the UWB-FHSS transmitter uses a frequency select filter to determine the transmit frequency. This frequency select filter can be related on the transmit side to the analog interpolation filter, except in reverse direction, as described in U.S. patent application Ser. No. 11/545,310, entitled “DIRECT BANDPASS SAMPLING RECEIVERS WITH ANALOG INTERPOLATION FILTERS AND RELATED METHODS,” which was filed on Oct. 10, 2006, the entire text and all contents for each of which are hereby expressly incorporated by reference in their entireties. The frequency select filter in essence serves the function of the analog interpolation filter on the transmit side. In one embodiment, as described above, the frequency select filter is implemented as a bank of switchable filters, and the transmit frequency is hopped by selecting different filters over time. In this implementation, the individual frequency select filters can have relatively wide bandwidth and a relatively poor filter transition region because the various possible transmit frequency pulses are spaced apart by at least a minimum of two-times (2×) the IF frequency. This frequency spacing is advantageous because the resulting relaxed filter specifications for each frequency select filter makes a filter bank much easier to realize in a feasible and cost effective implementation.

It is further noted that the transmit frequency can also be adjusted by tuning the transmit IF sample clock, as indicated in FIG. 4C above. Also as shown in FIG. 4C above, the transmit frequency can have additional modulation induced by modulating the transmit IF sample clock to provide additional information on the transmitted frequency Nyquist zone (e.g., in case of timing ambiguity). In other words, the transmit IF sample clock can be tuned to different frequencies, or can be modulated over time, or both to adjust the transmit frequency.

The UWB-FHSS receiver is useful for receiving a frequency hop signal over an extremely wide bandwidth. This architecture is related to the receiver architectures described in U.S. patent application Ser. No. 11/545,310, entitled “DIRECT BANDPASS SAMPLING RECEIVERS WITH ANALOG INTERPOLATION FILTERS AND RELATED METHODS,” which was filed on Oct. 10, 2006, and U.S. patent application Ser. No. 11/545,642, entitled “NYQUIST FOLDED BANDPASS SAMPLING RECEIVERS AND RELATED METHODS,” which was filed on Oct. 10, 2006, the entire text and all contents for each of which are hereby expressly incorporated by reference in their entireties. In contrast with these previous architectures, however, the UWB-FHSS receiver described herein uses a narrow bandwidth interpolation filter, as shown with respect to FIG. 1B, and can also use multiple narrow-band interpolation filters, as shown with respect to FIG. 4A. In this latter embodiment, the filters can be implemented as bandpass filters corresponding to the desired frequency hop with the frequencies of the hops being selected to alias into the interpolation filter. Another variation of the UWB-FHSS receiver, as described with respect to FIG. 4B, uses a wideband pre-select filter. This embodiment can be used to simplify the design of the receiver. However, possibly degraded performance could result because signals at frequencies other than the desired hops would likely be captured by the RF sampling process, although the narrow bandwidth interpolation filter will help to remove these undesired signals.

As a further modification and alternative implementation, the frequency hops may be selected to alias to slightly different frequencies at the output of the interpolation filter. As indicated above, if slightly different hop frequencies are desired as opposed to significantly different hop frequencies, the receive sample clock could be selected to be slightly different from the transmit clock. For example, if the receive sample clock was 2005 Msps, the folded hops when received would be 165 MHz, 170 MHz, 160 MHz, 175 MHz, and 155 MHz, respectively. Also, as described with respect to FIG. 4D, the RF sample clock may be modulated to provide additional spur-free dynamic range. It is noted that if the frequency hops alias to slightly different frequencies or if the RF sample clock is modulated, then the bandwidth of the interpolation filter can be made wide enough to take this into account. If the frequency hops alias to significantly different frequencies, then multiple narrow-band interpolation filters could be used as shown in FIG. 4A.

FIG. 5 is a block diagram for a radar system embodiment 500 utilizing UWB-FHSS transmitters and UWB-FHSS receivers as described herein. As depicted, radar system circuitry 504 includes UWB-FHSS transmitter circuitry 100 coupled to a transmit antenna 512 and to signal conversion and process circuitry 502. Radar system circuitry 504 also includes UWB-FHSS receiver circuitry 150 coupled to a receive antenna 514 and to signal conversion and processing circuitry 502. In operation, the frequency component signals 506 transmitted by the UWB-FHSS transmitter circuitry 100 through the transmit antenna 512 will strike objects, such as object (OBJ) 510, causing return frequency component signals 508 to be received at the receive antenna 514. The UWB-FHSS receiver circuitry 150 can then receive these receive frequency signals and provide them to the signal conversion and processing circuitry 502 for more processing to determine the location of the object (OBJ) 510. It is noted that a shared antenna could also be used, if desired.

FIG. 6 is a block diagram for a communication system embodiment 600 utilizing UWB-FHSS transmitters and UWB-FHSS receivers as described herein. As depicted, communication device circuitry 608 includes signal conversion and processing circuitry 602 coupled to UWB-FHSS transmitter circuitry 100 and to UWB-FHSS receiver circuitry 150. With respect to antennas 604 and 606 for communication device circuitry 608, frequency component signals are transmitted through transmit antenna 604 to communication device circuitry 618 and are received from communication device circuitry 618 through receive antenna 606. Similarly, communication device circuitry 618 includes signal conversion and processing circuitry 612 coupled to UWB-FHSS transmitter circuitry 100 and to UWB-FHSS receiver circuitry 150. With respect to antennas 614 and 616 for communication device circuitry 618, frequency component signals are transmitted through transmit antenna 616 to communication device circuitry 608 and received from communication device circuitry 608 through receive antenna 614. It is again noted that shared antennas could be utilized, if desired. Still further, it is noted that additional communication devices 620, 622 . . . could be included, as well, for communication with communication device circuitry 608 and/or themselves.

FIG. 7 is a block diagram for a transmitter-to-receiver broadcast system embodiment 700 utilizing UWB-FHSS transmitters and UWB-FHSS receivers as described herein. As depicted, transmitter device circuitry 706 includes signal conversion and processing circuitry 702 coupled to UWB-FHSS transmitter circuitry 100. Frequency component signals are transmitted through transmit antenna 704 to communication device circuitry 716. Receiver device circuitry 716 includes signal conversion and processing circuitry 712 coupled to UWB-FHSS receiver circuitry 150. Frequency component signals are received from transmitter device circuitry 706 through the receive antenna 714. Still further, it is noted that additional communication devices 718, 720 . . . could be included, as well, for receiving signals transmitted by the transmitter device circuitry 608.

Further modifications and alternative embodiments of this invention will be apparent to those skilled in the art in view of this description. It will be recognized, therefore, that the present invention is not limited by these example arrangements. Accordingly, this description is to be construed as illustrative only and is for the purpose of teaching those skilled in the art the manner of carrying out the invention. It is to be understood that the forms of the invention herein shown and described are to be taken as the presently preferred embodiments. Various changes may be made in the implementations and architectures. For example, equivalent elements may be substituted for those illustrated and described herein, and certain features of the invention may be utilized independently of the use of other features, all as would be apparent to one skilled in the art after having the benefit of this description of the invention. 

1. A wideband frequency hopping spread spectrum receiver, comprising: sampling circuitry configured to receive a receive signal at a radio frequency (f_(RF)), to receive sampling signals at a sample clock frequency (f_(S)) and to generate sampled output signals having a plurality of frequency components, the frequency components including frequencies at two or more harmonics of f_(S) plus and minus f_(RF), and the frequency components including at least one frequency component at an intermediate frequency (f_(IF)); and filter circuitry configured to provide a filter passband frequency range including the intermediate frequency (f_(IF)), the filter circuitry further configured to receive the sampled output signals and to have an output signal that includes the frequency component of the sampled output signals at the intermediate frequency (f_(IF)).
 2. The wideband frequency hopping spread spectrum receiver of claim 1, wherein the sample clock frequency is configured to match a frequency of a transmit sample clock frequency used to generate the receive signal.
 3. The wideband frequency hopping spread spectrum receiver of claim 2, wherein the filter circuitry comprises a narrowband bandpass filter having a filter passband frequency range including the intermediate frequency (f_(IF)).
 4. The wideband frequency hopping spread spectrum receiver of claim 1, wherein the sample clock frequency is configured to be different from a frequency of a transmit sample clock frequency used to generate the receive signal.
 5. The wideband frequency hopping spread spectrum receiver of claim 4, wherein the receive sample clock frequency is different from the transmit sample clock frequency by less than ten percent.
 6. The wideband frequency hopping spread spectrum receiver of claim 2, wherein the filter circuitry comprises a plurality of narrowband bandpass filters each having a filter passband frequency range centered on a different intermediate frequency (f_(IF)).
 7. The wideband frequency hopping spread spectrum receiver of claim 5, wherein output signals from each of the plurality of narrowband bandpass filters are processed to determine which one of a plurality of frequency components was used to transmit the receive signal.
 8. The wideband frequency hopping spread spectrum receiver of claim 1, further comprising amplifier circuitry configured to receive the receive signal from an antenna and to provide an amplified receive signal to the sampling circuitry.
 9. The wideband frequency hopping spread spectrum receiver of claim 1, wherein the filter circuitry comprises a narrowband interpolation filter centered around f_(IF).
 10. The wideband frequency hopping spread spectrum receiver of claim 1, wherein the sample clock frequency (f_(S)) is about 1 GHz or greater and the intermediate frequency (f_(IF)) is about 200 MHz or less.
 11. The wideband frequency hopping spread spectrum receiver of claim 1, wherein the sampling signals comprise modulated sampling clock signals.
 12. The wideband frequency hopping spread spectrum receiver of claim 1, wherein the sampling clock signal comprises a tuned sampling clock signal.
 13. The wideband frequency hopping spread spectrum receiver of claim 1, further comprising mixer circuitry configured to receive the filtered signals from the narrowband filter circuitry and to output an analog baseband signal, an analog-to-digital converter (ADC) configured to receive the analog baseband signal and output a digital signal, and digital signal processor (DSP) circuitry configured to receive and process the digital signal.
 14. A method for receiving wideband frequency hopping spread spectrum signals, comprising: sampling a receive signal using sampling signals at a sample clock frequency (f_(S)) to generate sampled output signals having a plurality of frequency components, the frequency components including frequencies at two or more harmonics of f_(S) plus and minus f_(RF), and the frequency components including at least one frequency component at an intermediate frequency (f_(IF)); and filtering the sampled signals with a filter passband frequency range around an intermediate frequency (f_(IF)) to generate an output signal that includes the frequency component of the sampled output signals at the intermediate frequency (f_(IF)).
 15. The method of claim 14, wherein the sampling step comprises using a sample clock frequency configured to match a frequency of a transmit sample clock frequency used to generate the receive signal.
 16. The method of claim 15, wherein the filtering step comprises using a narrowband bandpass filter having a filter passband frequency range including the intermediate frequency (f_(IF)).
 17. The method of claim 14, wherein the sampling step comprises using a sample clock frequency configured to be different from a frequency of a transmit sample clock frequency used to generate the receive signal.
 18. The method of claim 17, wherein the receive sample clock frequency is different from the transmit sample clock frequency by less than ten percent.
 19. The method of claim 17, wherein the filtering step comprises using a plurality of narrowband bandpass filters each having a filter passband frequency range centered on a different intermediate frequency (f_(IF)).
 20. The method of claim 19, further comprising processing output signals from each of the plurality of narrowband bandpass filters to determine which one of a plurality of frequency components was used to transmit the receive signal.
 21. The method of claim 14, wherein the sampling step comprises using a sample clock frequency (f_(S)) of about 1 GHz or greater and an intermediate frequency (f_(IF)) of about 200 MHz or less. 